47L04.PDF datasheet pdf

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47L04.PDF datasheet pdf

Datasheet Information

Pages: 40

 2015-2016 Microchip Technology Inc.DS20005371C-page 1 47L04/47C04/47L16/47C16 Device Selection Table Features • 4 Kbit/16 Kbit SRAM with EEPROM Backup: - Internally organized as 512 x 8 bits (47X04) or 2,048 x 8 bits (47X16) - Automatic Store to EEPROM array upon power-down (using optional external capacitor) - Automatic Recall to SRAM array upon power-up - Hardware Store pin for manual Store operations - Software commands for initiating Store and Recall operations - Store time 8 ms maximum (47X04) or 25 ms maximum (47X16) • Nonvolatile External Event Detect Flag • High Reliability: - Infinite read and write cycles to SRAM - More than one million store cycles to EEPROM - Data retention: >200 years - ESD protection: >4,000V • High-Speed I 2 C Interface: - Industry standard 100 kHz, 400 kHz and 1MHz - Zero cycle delay reads and writes - Schmitt Trigger inputs for noise suppression - Cascadable up to four devices • Write Protection: - Software write protection from 1/64 of SRAM array to whole array • Low-Power CMOS Technology: - 200 μA active current typical - 40 μA standby current (maximum) • 8-Lead PDIP, SOIC, and TSSOP Packages • Available Temperature Ranges: Description The Microchip Technology Inc. 47L04/47C04/47L16/47C16 (47XXX) is a 4/16 Kbit SRAM with EEPROM backup. The device is organized as 512 x 8 bits or 2,048 x 8 bits of memory, and utilizes the I 2 C serial interface. The 47XXX provides infinite read and write cycles to the SRAM while EEPROM cells provide high-endurance nonvolatile storage of data. With an external capacitor, SRAM data is automatically transferred to the EEPROM upon loss of power. Data can also be transferred manually by using either the Hardware Store pin or software control. Upon power-up, the EEPROM data is automatically recalled to the SRAM. Recall can also be initiated through software control. The 47XXX is available in the 8-lead PDIP, SOIC, and TSSOP packages. Block Diagram Part NumberDensity (bits) V CC Range Max. Clock Frequency Temperature Ranges Packages 47L044K2.7-3.6V1 MHzI, EP, SN, ST 47C044K4.5-5.5V1 MHzI, EP, SN, ST 47L1616K2.7-3.6V1 MHzI, EP, SN, ST 47C1616K4.5-5.5V1 MHzI, EP, SN, ST - Industrial (I): -40°C to+85°C - Automotive (E):-40°C to +125°C Power I 2 C Control Logic Memory Address and Data Control Logic Slave Address VCC Control Block VCAP Decoder EEPROM 512 x 8 RECALL STORE SDA SCL A2, A1 HS 2K x 8 SRAM 512 x 8 Status Register 2K x 8 4K/16K I 2 C Serial EERAM

Features
  • • 4 Kbit/16 Kbit SRAM with EEPROM Backup:
  • - Internally organized as 512 x 8 bits (47X04)
  • - Automatic Store to EEPROM array upon
  • - Automatic Recall to SRAM array upon
  • - Hardware Store pin for manual Store
  • - Software commands for initiating Store and
  • - Store time 8 ms maximum (47X04) or
  • • Nonvolatile External Event Detect Flag
  • • High Reliability:
  • - Infinite read and write cycles to SRAM
  • - More than one million store cycles to
  • - Data retention: >200 years
  • - ESD protection: >4,000V
  • • High-Speed I
  • - Industry standard 100 kHz, 400 kHz and
  • - Zero cycle delay reads and writes
  • - Schmitt Trigger inputs for noise suppression
  • - Cascadable up to four devices
  • • Write Protection:
  • - Software write protection from 1/64 of SRAM
  • • Low-Power CMOS Technology:
  • - 200 μA active current typical
  • - 40 μA standby current (maximum)
  • • 8-Lead PDIP, SOIC, and TSSOP Packages
  • • Available Temperature Ranges:
  • - Industrial (I): -40°C to+85°C
  • - Automotive (E):-40°C to +125°C