BS616LV8011 datasheet pdf

Revision 2.3 April 2002 1 R0201-BS616LV8011 Very Low Power/Voltage CMOS SRAM 512K X 16 bit BS616LV8011 POWER DISSIPATION SPEED (ns) STANDBY (I, Max)CCSB1 Operating (I, Max)CC PRODUCT FAMILY OPERATING TEMPERATURE Vcc RANGE Vcc=3.0VVcc=3.0VVcc=3.0V PKG TYPE BS616LV8011AC+0 O C to +70 O C2.7 BS616LV8011AI-40 O C to +85 O C2.7 V ~ 3.6V70 / 10016uA40mABGA-48-0608 V ~ 3.6V70 / 10024uA50mABGA-48-0608 • Very low operation voltage : 2.7 ~ 3.6V • Very low power consumption : Vcc = 3.0V C-grade: 40mA (Max.) operating current I-grade : 50mA (Max.) operating current 1uA (Typ.) CMOS standby current • High speed access time : -70 70ns (Max.) at Vcc=3.0V -10 100ns (Max.) at Vcc=3.0V • Automatic power down when chip is deselected • Three state outputs and TTL compatible • Fully static operation • Data retention supply voltage as low as 1.5V • Easy expansion with CE1,CE2 and OE options The BS616LV8011 is a high performance, very low power CMOS Static Random Access Memory organized as 524,288 words by 16 bits and operates from a wide range of 2.7V to 3.6V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 1uA and maximum access time of 70/100ns in 3V operation. Easy memory expansion is provided by an active LOW chip enable(CE1,CE2) and active LOW output enable(OE) and three-state output drivers. The BS616LV8011 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616LV8011 is available in 48-pin BGA package. „DESCRIPTION „FEATURES Row Decoder Memory Array 2048 x 4096 Column I/O Write Driver Sense Amp Column Decoder Data Buffer Output A9 A8 A7 Data Input Buffer Control Gnd Vcc OE A15 A1 16 16 16 16 CE1 D15 D0 A0 A13 A14 A2 16 256 4096 „BLOCK DIAGRAM 2048 22 A17 A16 A10 A12 A6 A11 A3 Address Input Buffer A5 Address Input Buffer . . . . . . . . „PRODUCT FAMILY „PIN CONFIGURATIONS Brilliance Semiconductor Inc.reserves the right to modify document contents without notice. A4 A18 OE A0A1A2 CE2 D8A3A4 CE1D0 D9D10 VSS D3 VCC VCC D1D4 VSS A15 2A A5A6D1D2 D11A17A7 2A16 D14D13A14 D5D6 D15NC.A1 13 WED7 A18 A8A9 A10A11NC. A B C D E F G H 123456 Vss X X WE CE2 X: Don’t care48-Ball CSP top View BSI

Features

• • Very low operation voltage : 2.7 ~ 3.6V
• • Very low power consumption :
• • High speed access time :
• -70 70ns (Max.) at Vcc=3.0V
• -10 100ns (Max.) at Vcc=3.0V
• • Automatic power down when chip is deselected
• • Three state outputs and TTL compatible
• • Fully static operation
• • Data retention supply voltage as low as 1.5V
• • Easy expansion with CE1,CE2 and OE options