Loading PDF...
Pages: 10
Revision 2.2 April 2001 1 R0201-BS616UV1610 Ultra Low Power/Voltage CMOS SRAM 1M X 16 bit • Ultra low operation voltage : 1.8 ~ 2.3V • Ultra low power consumption : Vcc = 2.0V C-grade: 25mA (Max.) operating current I-grade : 30mA (Max.) operating current 1.2uA (Typ.) CMOS standby current • High speed access time : -70 70ns (Max.) at Vcc=2V -10 100ns (Max.) at Vcc=2V • Automatic power down when chip is deselected • Three state outputs and TTL compatible • Fully static operation • Data retention supply voltage as low as 1.5V • Easy expansion with CE2,CE1 and OE options • I/O Configuration x8/x16 selectable by LB and UB pin DESCRIPTION FEATURES BLOCK DIAGRAM PRODUCT FAMILY PIN CONFIGURATIONS Brilliance Semiconductor Inc. reserves the right to modify document contents without notice. BS616UV1610 The BS616UV1610 is a high performance, ultra low power CMOS Static Random Access Memory organized as 1,048,576 words by 16 bits and operates from a wide range of 1.8V to 2.3V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 1.2uA and maximum access time of 70/100ns in 2V operation. Easy memory expansion is provided by an active LOW chip enable(CE1), active HIGH chip enable (CE2), active LOW output enable(OE) and three-state output drivers. The BS616UV1610 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616UV1610 is available in 48-pin BGA package. POWER DISSIPATION SPEED (ns) STANDBY (I CCSB1 , Max) Operating (I CC , Max) Vcc RANGE Vcc=2VVcc=2VVcc=2V PKG TYPE BS616UV1610BCBGA - 48 - 0810 BS616UV1610FC +0 O C to +70 O C 1.8 ~ 2.3V 30uA BGA - 48 - 0912 70 / 100 25mA BS616UV1610BIBGA - 48 - 0810 BS616UV1610FI - 40 O C to +85 O C 1.8 ~ 2.3V70 / 100 40uA30mA BGA - 48 - 0912 LBOEA0A1A2 CE2 CE1 D0D8 UB A3A4 D9D10A5A6D1D2 VSS D3 VCC VCC D12A16D4 VSS A15 2A13 WE D7 A18 A8A9 D11A17A7 D14D13A14 D5D6 D15NC.A1 A10A11A19. A B C D E F G H 123456 VSS Row Decoder Memory Array 2048 x 8192 Column I/O Write Driver Sense Amp Column Decoder Data Buffer Output A9 A8 A7 Data Input Buffer Control Gnd Vcc OE A15 A1 16 16 16 16 WE CE1 D15 D0 A0 A13 A14 A2 18 512 8192 2048 22 A17 A16 A10 A12 A6 A11 A3 Address Input Buffer A5 Address Input Buffer . . . . UB . . . . LB A4 A18 CE2 A19 48-Ball CSP top View BSI PRODUCT FAMILY OPERATING TEMPERATURE