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Revision 2.4 April 2002 1 R0201-BS616UV8010 POWER DISSIPATION STANDBY (I CCSB1 , Max) Operating (I CC , Max) Vcc RANGE Vcc=2 V PKG TYPE BS616UV8010BC +0 O C to +70 O C 1.8V ~ 3.6V 70 / 1002uA3uA15mA20mA BGA - 48 - 0810 BS616UV8010BI - 40 O C to +85 O C 1.8V ~ 3.6V 70 / 1004uA6uA20mA25mA BGA - 48 - 0810 Ultra Low Power/Voltage CMOS SRAM 512K X 16 bit • Ultra low operation voltage : 1.8 ~ 3.6V • Ultra low power consumption : Vcc = 2.0V C-grade: 15mA (Max.) operating current I-grade : 20mA (Max.) operating current 0.4uA (Typ.) CMOS standby current Vcc = 3.0V C-grade: 20mA (Max.) operating current I-grade : 25mA (Max.) operating current 0.5uA (Typ.) CMOS standby current • High speed access time : -70 70ns (Max.) at Vcc=2V -10 100ns (Max.) at Vcc=2V • Automatic power down when chip is deselected • Three state outputs and TTL compatible • Fully static operation • Data retention supply voltage as low as 1.5V • Easy expansion with CE2,CE1 and OE options • I/O Configuration x8/x16 selectable by LB and UB pin DESCRIPTION FEATURES BLOCK DIAGRAM PRODUCT FAMILY PIN CONFIGURATIONS Brilliance Semiconductor Inc. reserves the right to modify document contents without notice. BS616UV8010 LBOEA0A1A2 CE2 D8UBA3A4CE1D0 D9D10A5A6D1D2 VSS VCC D12A16D4 VS S A15 12A 13 WE D7 D11A17A7D3VCC D14D13A14 D5D6 D15NC.A A8 A8A9 A10A11 NC 1 A B C D E F G H 123456 VSS The BS616UV8010 is a high performance, ultra low power CMOS Static Random Access Memory organized as 524,288 words by 16 bits and operates from a wide range of 1.8V to 3.6V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0.4uA and maximum access time of 70/100ns in 2V operation. Easy memory expansion is provided by an active LOW chip enable(CE1), active HIGH chip enable (CE2), active LOW output enable(OE) and three-state output drivers. The BS616UV8010 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616UV8010 is available in 48-pin BGA package. Row Decoder Memory Array 2048 x 4096 Column I/O Write Driver Sense Amp Column Decoder Data Buffer Output A9 A8 A7 Data Input Buffer Control Gnd Vcc OE A15 A1 16 16 16 16 WE CE1 D15 D0 A0 A13 A14 A2 16 256 4096 2048 22 A17 A16 A10 A12 A6 A11 A3 Address Input Buffer A5 Address Input Buffer . . . . UB . . . . LB A4 A18 CE2 48-Ball CSP top View BSI OPERATING TEMPERATURE Vcc=2V Vcc=3V Vcc=2V Vcc=3V SPEED PRODUCT FAMILY (ns)