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Revision 2.4 April 2002 1 R0201-BS616LV8015 Very Low Power/Voltage CMOS SRAM 512K X 16 bit • Very low operation voltage : 4.5~5.5V • Very low power consumption : Vcc = 5.0V C-grade: 45mA (Max.) operating current I-grade : 50mA (Max.) operating current 3uA (Typ.) CMOS standby current • High speed access time : -55 70ns (Max.) at Vcc=5V -70 70ns (Max.) at Vcc=5V • Automatic power down when chip is deselected • Three state outputs and TTL compatible • Fully static operation • Data retention supply voltage as low as 1.5V • Easy expansion with CE1,CE2 and OE options • I/O Configuration x8/x16 selectable by LB and UB pin The BS616LV8015 is a high performance, very low power CMOS Static Random Access Memory organized as 524,288 words by 16 bits and operates from a wide range of 4.5V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 3uA and maximum access time of 55/70ns in 5V operation. Easy memory expansion is provided by an active LOW chip enable(CE1), active HIGH chip enable (CE2), active LOW output enable(OE) and three-state output drivers. The BS616LV8015 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616LV8015 is available in 48-pin BGA package. DESCRIPTION FEATURES BLOCK DIAGRAM PRODUCT FAMILY PIN CONFIGURATIONS Brilliance Semiconductor Inc. reserves the right to modify document contents without notice. BS616LV8015 LBOE A0A1A2 CE2 D8UBA3A4CE1D0 D9D10A5A6D1D2 VSS D3 VCC VCC D12A16D4 VSS D14 D13A14 A15 D15 NC. A12 A13 WE D7 D11A17A7 D5D6 A8 A8A9 A10A11 NC 1 A B C D E F G H 123456 VSS POWER DISSIPATION SPEED (ns) STANDBY (I, Max)CCSB1 Operating (I, Max)CC PRODUCT FAMILY OPERATING TEMPERATURE Vcc RANGE Vcc=5VVcc=5VVcc=5V PKG TYPE BS616LV8015BC+0 O C to +70 O C4.5V ~ BS616LV8015BI-40 O C to +85 O C4.5V ~ 5.5V55 / 7030uA45mABGA-48-0810 5.5V55 / 70100uA50mABGA-48-0810 Row Decoder Memory Array 2048 x 4096 Column I/O Write Driver Sense Amp Column Decoder Data Buffer Output A9 A8 A7 Data Input Buffer Control Gnd Vcc OE A15 A1 16 16 16 16 WE CE1 D15 D0 A0 A13 A14 A2 16 256 4096 2048 22 A17 A16 A10 A12 A6 A11 A3 Address Input Buffer A5 Address Input Buffer . . . . UB . . . . LB A4 A18 CE2 48-Ball CSP top View BSI