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Revision 2.2 April 2001 1 R0201-BS616UV1010 POWER DISSIPATION SPEED (ns) STANDBY (I CCSB1 , Max) Operating (I CC , Max) PRODUCT FAMILY OPERATING TEMPERATURE Vcc RANGE Vcc=3.0VVcc=3.0VVcc=2.0VVcc=3.0VVcc=2.0V PKG TYPE BS616UV1010ECTSOP2-44 BS616UV1010AC +0 O C to +70 O C1.8V ~ 3.6V1500.5uA0.3uA15mA10mA BGA-48-0608 BS616UV1010EITSOP2-44 BS616UV1010AI -40 O C to +85 O C1.8V ~ 3.6V1501uA20mA1.5uA15mA BGA-48-0608 Ultra Low Power/Voltage CMOS SRAM 64K X 16 bit • Ultra low operation voltage : 1.8 ~ 3.6V • Ultra low power consumption : Vcc = 2.0VC-grade : 10mA (Max.) operating current I- grade : 15mA (Max.) operating current 0.01uA (Typ.) CMOS standby current Vcc = 3.0VC-grade : 15mA (Max.) operating current I- grade : 20mA (Max.) operating current 0.02uA (Typ.) CMOS standby current • High speed access time : -15 150ns (Max.) at Vcc = 3.0V • Input levels are CMOS-compatible • Automatic power down when chip is deselected • Three state outputs and TTL compatible • Fully static operation • Data retention supply voltage as low as 1.5V • Easy expansion with CE and OE options • I/O Configuration x8/x16 selectable by LB and UB pin The BS616UV1010 is a high performance, ultra low power CMOS Static Random Access Memory organized as 65,536 words by 16 bits and operates from a wide range of 1.8V to 3.6V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0.01uA and maximum access time of 150ns in 2V operation. Easy memory expansion is provided by an active LOW chip enable(CE) and active LOW output enable(OE) and three-state output drivers. The BS616UV1010 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616UV1010 is available in the JEDEC standard 44-pin TSOP Type II and 48-pin mini-BGA. DESCRIPTION FEATURES Row Decoder Memory Array 512 x 2048 Column I/O Write Driver Sense Amp Column Decoder Data Buffer Output A3 A2 A1 Data Input Buffer Control Gnd Vcc OE DQ0 A7 A15 A13 16 16 16 16 WE CE DQ15 A5 A6 14 128 2048 BLOCK DIAGRAM 512 18 A14 A12 A9 A4 A0 A11 A8 Address Input Buffer A10 Address Input Buffer . . . . UB . . . . LB PRODUCT FAMILY PIN CONFIGURATIONS Brilliance Semiconductor Inc.reserves the right to modify document contents without notice. BS616UV1010 G H F E D C B A 12345 A9A8NC IO15 IO14 NC IO13 A12 A14 NCA11A10 A13 A15 WE IO5 IO7 IO6 VCC VSS IO9 IO12 IO11 IO10 NC NC A5 NC A7 A6 IO4 IO3 IO1 VSS VCC IO2 IO8 LB UB OE A3 A0 A4 A1 CE A2 IO0 NC 6 A4 A3 A2 A1 A0 CE DQ0 DQ1 DQ2 DQ3 VCC GND DQ4 DQ5 DQ7 DQ6 WE A15 A14 A13 A12 NC A5 A6 A7 OE UB LB DQ15 DQ14 DQ13 DQ12 GND VCC DQ11 DQ10 DQ9 DQ8 NC A8 A9 A10 A11 NC 1 2 3 4 5 18 20 22 43 41 39 28 26 24 23 6 7 8 9 10 11 12 13 14 16 37 36 35 34 33 32 31 30 BS616UV1010EC BS616UV1010EI 15 17 19 21 44 42 40 38 29 27 25 BSI