BCR39PN
Nov-29-20011
NPN/PNP Silicon Digital Transistor Array
BCR39PN
Nov-29-20011
NPN/PNP Silicon Digital Transistor Array
Specifications
Switching circuit, inverter, interface circuit,
driver circuit
Two (galvanic) internal isolated NPN/PNP
Transistors in one package
Built in bias resistor (R
1
= 22k)
Tape loading orientation
VPS05604
6
3
1
5
4
2
EHA07193
123
456
W1s
Direction of Unreeling
Top View
Marking on SOT-363 package
(for example W1s)
corresponds to pin 1 of device
Position in tape: pin 1
opposite of feed hole side
EHA07290
654
321
C1B2E2
C2B1E1
1
R
R
1
TR1
TR2
TypeMarkingPin ConfigurationPackage
BCR39PNW3s1=E12=B13=C24=E25=B26=C1
SOT363
Maximum Ratings
Parameter
SymbolValueUnit
Collector-emitter voltage
V
CEO
50V
Collector-base voltage
V
CBO
50
Emitter-base voltage
V
EBO
5
Input on Voltage
V
i(on)
30
DC collector current
I
C
100mA
Total power dissipation, T
S
= 115 °CP
tot
250mW
Junction temperature
T
j
150°C
Storage temperature
T
stg
-65 ... 150
Thermal Resistance
Junction - soldering point
1)
R
thJS
140K/W
1
For calculation of R
thJA
please refer to Application Note Thermal Resistance