UA555 datasheet pdf

~A555 SINGLE TIMING CIRCUIT FAIRCHILD LINEAR INTEGRATED CIRCUIT GENERAL DESCRIPTION -The I'A555 Timing Circuit is a very stable controller for producing accurate time delays or oscillations. In the time delay mode, the delay time is precisely controlled by one external resistor and one capacitor; in the oscillator mode, the frequency and duty cycle are both accurately controlled with two external resistors and one capacitor. By applying a trigger signal, the timing cycle is started and an internal flip-flop is set, immunizing the circuit from any further trigger signals. To interrupt the timing cycle a reset signal is applied ending the time-out. The output, which is capable of sinking or sourcing 200 mA, is compatible with TTL circuits and can drive relays or indicator lamps. • MICROSECONDS THROUGH HOURS TIMING CONTROL • ASTABLE OR MONOSTABLE OPERATING MODES • ADJUSTABLE DUTY CYCLE • 200 mA SINK OR SOURCE OUTPUT CURRENT CAPABILITY • TTL OUTPUT DRIVE CAPABILITY • TEMPERATURE STABILITY OF 0.005% PER °c • NORMALLY ON OR NORMALLY OFF OUTPUT • DIRECT REPLACEMENT FOR SE555/NE555 ABSOLUTE MAXIMUM RATINGS Supply Voltage Power Dissipation (Note 1) Operating Temperature Ranges I'A555TC/HC I'A555HM Storage Temperature Range 'Pin Temperature Plastic Mini DIP(9T) (Soldering, 10 s) Metal Can (5T) (Soldering, 60 s) BLOCK DIAGRAM +18 V 600mW O°C to +70°C _55°C to +125°C -65°C to +150°C 260°C 300°C vcc--o--.... - ------1 TH A ESHO LD --o----1---i CONTROL --0--4--1 VOLTAGE TRIGGER --0---1----1 FlIp·FLOP S Q INHIBIT! RESET .-----<>--DISCHARGE '--o!D-----<r--OUTPUT RESET~----<-)---~ -_-_-_--' _____ ~ 7-3 CONNECTION DIAGRAMS . 8-PIN MINI DIP (TOP VIEW) PACKAGE OUTLINE 9T GND TRIGGER OUT RESET ORDER INFORMATION TYPE IlA555 PART NO. I'A555TC 8-PIN To-l00 (TOP VIEW) PACKAGE OUTLINE 5T +Vcc RESET ORDER INFORMATION TYPE IlA555 I'A555 PART NO. I'A555HM I'A555HC •